Staircase signal generator


This is the schematic of a staircase signal generator, very useful to adjust video signal level between black and white limits of a complex tv video signal. Digital schematic was preferred due to better signal switching parameters and low number of parts.

Dual D-type FF(pre,clr) 7474 is used , truth table:


PRE’   CLR’ CLK   D     Q Q’

0          1          X       X 1     0

1          0          X       X 0     1

0          0          X       X 1     1

1          1          POS 1       1     0

1          1          POS 0       0     1

1          1          0        X HOLD


POS = positive-edge triggered.


The sequence of events is as follows : The clock generator sends clock signal to all circuits. The moment the switch sends a “1” (logical 1 = +5v ) to the input D of the first FF this one switches to “1” at it’s Q output and so this will determinate all other FF to switch one after another, always function of clock signal, of course. Finally all FF will present a “1” at their Q outputs.

To repeat the cycle, we will reset all FF at the same time. The inputs : PRE  of every FF will receive a “1” from the output of a AND gate (pin 3 of ic : 7408 ). This one will be controlled at its inputs (pins 1 & 2 of ic 7408) by the A and D outputs of the counter 7490 which represents the moment 10 in Decimal and 9 in Binary.


So, to review : the 7490 counter counts every clock pulse. Every FF will switch in a clock period so we will have 10 switches (0 to 9), at the 10 th moment all FF will have a “1” at their Q outputs. At the following clock signal, all FF will be reset.

All Q outputs are connected to an “integrator” ( ic 741 ). Every time a FF switches, at the output of the integrator we will have a new level (added to the preceding one), but following in time, so it will be shaped like stairs.

Now that the generator works, we have to remember the final function of it, i.e to use it to adjust tv video circuits.That means we need that the staircase signal “enters” in a 64 us time period (the period of a tv line ) or a 15625 hz (horizontal sweep), so as we have ten stairs (10 clock pulses), we need the clock frequency to be ten times the horizontal sweep frequency I .e .156250 hz.


Now, things get a bit complicated because the higher the frequency, the greater the distorsions, mainly because of the opamp : 741 which works well until approx. 60 khz.We have to choose another type of opamp like LF411, which is able to work at the desired frequency.

As a clock generator , we utilized the following circuit with a 555 ic :

With the part values in the schematic, we get a clock signal of 6.95 us and we need 6.4 us, so we will adjust on the 4.7 kohm resistor (we could use a 4.7 linear potentiometer).

At the output of the generator, we will have to match with the input resistance of the circuit we study (or adjust). We could use an emitor/follower or a “ buffer “realized with an other LF411 installed in a “ buffer “ pattern :

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